SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint32_t[__arm_]vaddvq_p[_s8](int8x16_t a, mve_pred16_t p)Vector arithmetic / Add / Addition
Description
Add across the elements of a vector accumulating the result into a scalar. The initial value of the general-purpose destination register can optionally be added to the result.
Results
Rda result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VADDVT.S8 Rda,Qm

Argument Preparation
a register: Qmp register: Rp
Architectures
MVE