[__arm_]vandq[_f16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | float16x8_t | [__arm_]vandq[_f16] | (float16x8_t a, float16x8_t b) | Logical / AND | |
Description Compute a bitwise AND of a vector register with another vector register. The result is written to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VAND Argument Preparation a register: Qnb register: Qm Architectures MVE | |||||
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