[__arm_]vbicq[_s16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int16x8_t | [__arm_]vbicq[_s16] | (int16x8_t a, int16x8_t b) | Bit manipulation / Bitwise clear | |
Description Compute a bitwise AND of a vector register and the complement of a vector register. Results Qd result This intrinsic compiles to the following instructions: VBIC Argument Preparation a register: Qnb register: Qm Architectures MVE | |||||
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.