SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint8x16_t[__arm_]vbicq[_u8](uint8x16_t a, uint8x16_t b)Bit manipulation / Bitwise clear
Description
Compute a bitwise AND of a vector register and the complement of a vector register.
Results
Qd result
This intrinsic compiles to the following instructions:

VBIC Qd,Qn,Qm

Argument Preparation
a register: Qnb register: Qm
Architectures
MVE