[__arm_]vbicq_m_n[_s16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int16x8_t | [__arm_]vbicq_m_n[_s16] | (int16x8_t a, const int16_t imm, mve_pred16_t p) | Bit manipulation / Bitwise clear | |
Description Compute a bitwise AND of a vector register and the complement of an immediate value. Results Qda result This intrinsic compiles to the following instructions: VMSR VPST VBICT.I16 Argument Preparation a register: Qdaimm p register: Rp Architectures MVE | |||||
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