[__arm_]vcmpeqq[_u32]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | mve_pred16_t | [__arm_]vcmpeqq[_u32] | (uint32x4_t a, uint32x4_t b) | Compare / Equal to | |
Description Perform a lane-wise comparison between each element in the first source vector register and either the respective elements in the second source vector register or the value of a general-purpose register. The resulting boolean conditions are placed in VPR.P0. The VPR.P0 flags for predicated lanes are zeroed. Results Rd result This intrinsic compiles to the following instructions: VCMP.I32 VMRS Argument Preparation a register: Qnb register: Qm Architectures MVE | |||||
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.