[__arm_]vcvtq_n_u16_f16
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Helium | uint16x8_t | [__arm_]vcvtq_n_u16_f16 | (float16x8_t a, const int imm6) | Data type conversion / Conversions | |
Description Convert between floating-point and fixed-point values in elements of a vector register. The number of fractional bits in the fixed-point value is specified by an immediate. Fixed-point values can be specified as signed or unsigned. The floating-point to fixed-point operation uses the Round towards Zero rounding mode. The fixed-point to floating-point operation uses the Round to Nearest rounding mode. For floating-point to fixed-point operation, if the source value is outside the range of the target fixed-point type, the result is saturated. Results Qd result This intrinsic compiles to the following instructions: VCVT.U16.F16 Argument Preparation a register: Qmimm6 minimum: 1; maximum: 16 Architectures MVE |
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