[__arm_]vdupq_m[_n_u8]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | uint8x16_t | [__arm_]vdupq_m[_n_u8] | (uint8x16_t inactive, uint8_t a, mve_pred16_t p) | Vector manipulation / Create vector | |
Description Set each element of a vector register to the value of a general-purpose register. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VDUPT.8 Argument Preparation inactive register: Qda register: Rtp register: Rp Architectures MVE | |||||
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