[__arm_]vdupq_x_n_s8
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int8x16_t | [__arm_]vdupq_x_n_s8 | (int8_t a, mve_pred16_t p) | Vector manipulation / Create vector | |
Description Set each element of a vector register to the value of a general-purpose register. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VDUPT.8 Argument Preparation a register: Rtp register: Rp Architectures MVE | |||||
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