SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint32x4_t[__arm_]vdupq_x_n_u32(uint32_t a, mve_pred16_t p)Vector manipulation / Create vector
Description
Set each element of a vector register to the value of a general-purpose register.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VDUPT.32 Qd,Rt

Argument Preparation
a register: Rtp register: Rp
Architectures
MVE