SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint32x4_t[__arm_]veorq_x[_u32](uint32x4_t a, uint32x4_t b, mve_pred16_t p)Logical / Exclusive OR
Description
Compute a bitwise EOR of a vector register with another vector register. The result is written to the destination vector register.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VEORT Qd,Qn,Qm

Argument Preparation
a register: Qnb register: Qmp register: Rp
Architectures
MVE