[__arm_]vgetq_lane[_u16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | uint16_t | [__arm_]vgetq_lane[_u16] | (uint16x8_t a, const int idx) | Vector manipulation / Extract one element from vector | |
Description There are various instructions to semantically represent this instruction, any instruction or sequence of instructions that returns the value at the indicated register lane is valid. Results Rt result This intrinsic compiles to the following instructions: VMOV.U16 Argument Preparation a register: Qnidx minimum: 0; maximum: 7 Architectures MVE | |||||
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