[__arm_]vhaddq[_s8]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int8x16_t | [__arm_]vhaddq[_s8] | (int8x16_t a, int8x16_t b) | Vector arithmetic / Add / Addition | |
Description Add the value of the elements in the first source vector register to either the respective elements in the second source vector register or a general-purpose register. The result is halved before being written to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VHADD.S8 Argument Preparation a register: Qnb register: Qm Architectures MVE | |||||
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