[__arm_]vhaddq_m[_u16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | uint16x8_t | [__arm_]vhaddq_m[_u16] | (uint16x8_t inactive, uint16x8_t a, uint16x8_t b, mve_pred16_t p) | Vector arithmetic / Add / Addition | |
Description Add the value of the elements in the first source vector register to either the respective elements in the second source vector register or a general-purpose register. The result is halved before being written to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VHADDT.U16 Argument Preparation inactive register: Qda register: Qnb register: Qmp register: Rp Architectures MVE | |||||
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