SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumfloat16x8_t[__arm_]vminnmq_m[_f16](float16x8_t inactive, float16x8_t a, float16x8_t b, mve_pred16_t p)Vector arithmetic / Minimum
Description
Find the floating-point minimum number of the elements in the source operands, and store the result in the corresponding destination elements. It handles NaNs in consistence with the IEEE754-2008 specification, and returns the numerical operand when one operand is numerical and the other is a quiet NaN. The absolute variant takes the absolute values of the elements from the destination vector and compares them to the absolute values of the corresponding elements in the source vector. The smaller values are stored back into the destination vector.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VMINNMT.F16 Qd,Qn,Qm

Argument Preparation
inactive register: Qda register: Qnb register: Qmp register: Rp
Architectures
MVE