SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint16x8_t[__arm_]vmovlbq_x[_s8](int8x16_t a, mve_pred16_t p)Move / Vector move
Description
Selects an element of 8 or 16-bits from either the top half (T variant) or bottom half (B variant) of each source element, sign or zero-extends, performs a signed or unsigned left shift by an immediate value and places the 16 or 32-bit results in the destination vector.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VMOVLBT.S8 Qd,Qm

Argument Preparation
a register: Qmp register: Rp
Architectures
MVE