[__arm_]vmullbq_int_m[_u32]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | uint64x2_t | [__arm_]vmullbq_int_m[_u32] | (uint64x2_t inactive, uint32x4_t a, uint32x4_t b, mve_pred16_t p) | Vector arithmetic / Multiply / Multiplication | |
Description Performs an element-wise integer multiplication of two single-width source operand elements. These are selected from either the top half (T variant) or bottom half (B variant) of double-width source vector register elements. The operation produces a double-width result. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VMULLBT.U32 Argument Preparation inactive register: Qda register: Qnb register: Qmp register: Rp Architectures MVE | |||||
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