SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint32x4_t[__arm_]vmulltq_int[_s16](int16x8_t a, int16x8_t b)Vector arithmetic / Multiply / Multiplication
Description
Performs an element-wise integer multiplication of two single-width source operand elements. These are selected from either the top half (T variant) or bottom half (B variant) of double-width source vector register elements. The operation produces a double-width result.
Results
Qd result
This intrinsic compiles to the following instructions:

VMULLT.S16 Qd,Qn,Qm

Argument Preparation
a register: Qnb register: Qm
Architectures
MVE