[__arm_]vorrq_m_n[_u16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | uint16x8_t | [__arm_]vorrq_m_n[_u16] | (uint16x8_t a, const uint16_t imm, mve_pred16_t p) | Logical / OR | |
Description OR the value of a vector register with the immediate operand value. The immediate is generated by the AdvSIMDExpandImm() function based on the requested data type and immediate value. Results Qda result This intrinsic compiles to the following instructions: VMSR VPST VORRT.I16 Argument Preparation a register: Qdaimm p register: Rp Architectures MVE | |||||
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