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SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliummve_pred16_t[__arm_]vpnot(mve_pred16_t a)Predication / Vector Predicate NOT
Description
Inverts the predicate condition in VPR.P0. The VPR.P0 flags for predicated lanes are zeroed.
Results
Rt result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPNOT

VMRS Rt,P0

Argument Preparation
a register: Rp
Architectures
MVE