SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint8x16_t[__arm_]vqaddq_m[_n_s8](int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)Vector arithmetic / Add / Saturating addition
Description
Add the value of the elements in the first source vector register to either the respective elements in the second source vector register or a general-purpose register. The result is saturated before being written to the destination vector register.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VQADDT.S8 Qd,Qn,Rm

Argument Preparation
inactive register: Qda register: Qnb register: Rmp register: Rp
Architectures
MVE