SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint16x8_t[__arm_]vqaddq_m[_s16](int16x8_t inactive, int16x8_t a, int16x8_t b, mve_pred16_t p)Vector arithmetic / Add / Saturating addition
Description
Add the value of the elements in the first source vector register to either the respective elements in the second source vector register or a general-purpose register. The result is saturated before being written to the destination vector register.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VQADDT.S16 Qd,Qn,Qm

Argument Preparation
inactive register: Qda register: Qnb register: Qmp register: Rp
Architectures
MVE