[__arm_]vqdmulltq_m[_n_s16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int32x4_t | [__arm_]vqdmulltq_m[_n_s16] | (int32x4_t inactive, int16x8_t a, int16_t b, mve_pred16_t p) | Vector arithmetic / Multiply / Saturating multiply | |
Description Performs an element-wise integer multiplication of two single-width source operand elements. These are selected from either the top half (T variant) or bottom half (B variant) of double-width source vector register elements or the lower single-width portion of the general-purpose register. The product of the multiplication is doubled and saturated to produce a double-width product that is written back to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VQDMULLTT.S16 Argument Preparation inactive register: Qda register: Qnb register: Rmp register: Rp Architectures MVE | |||||
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