SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumint8x16_t[__arm_]vqrdmulhq_m[_n_s8](int8x16_t inactive, int8x16_t a, int8_t b, mve_pred16_t p)Vector arithmetic / Multiply / Saturating multiply
Description
Multiply a general-purpose register value by each element of a vector register to produce a vector of results or multiply each element of a vector register by its corresponding element in another vector register, double the results, and place the most significant half of the final results in the destination vector. The results are optionally rounded before being saturated.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VQRDMULHT.S8 Qd,Qn,Rm

Argument Preparation
inactive register: Qda register: Qnb register: Rmp register: Rp
Architectures
MVE