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SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint8x16_t[__arm_]vqrshlq[_u8](uint8x16_t a, int8x16_t b)Shift / Left / Vector saturating rounding shift left
Description
The vector variant shifts each element of the first vector by a value from the least significant byte of the corresponding element of the second vector and places the results in the destination vector. The register variants shift each element of a vector register by the value specified in a source register. The direction of the shift depends on the sign of the element from the second vector register.
Results
Qd result
This intrinsic compiles to the following instructions:

VQRSHL.U8 Qd,Qm,Qn

Argument Preparation
a register: Qmb register: Qn
Architectures
MVE