SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint8x16_t[__arm_]vqshrntq_m[_n_u16](uint8x16_t a, uint16x8_t b, const int imm, mve_pred16_t p)Shift / Right / Vector saturating rounding shift right and narrow
Description
Performs an element-wise saturation to half-width, with shift, writing the result to either the top half (T variant) or bottom half (B variant) of the result element. The other half of the destination vector element retains its previous value.
Results
Qd result
This intrinsic compiles to the following instructions:

VMSR P0,Rp

VPST

VQSHRNTT.U16 Qd,Qm,#imm

Argument Preparation
a register: Qdb register: Qmimm minimum: 1; maximum: 8p register: Rp
Architectures
MVE