[__arm_]vrhaddq[_u32]
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Helium | uint32x4_t | [__arm_]vrhaddq[_u32] | (uint32x4_t a, uint32x4_t b) | Vector arithmetic / Add / Addition | |
Description Add the value of the elements in the first source vector register to the respective elements in the second source vector register. The result is halved and rounded before being written to the destination vector register. Results Qd result This intrinsic compiles to the following instructions: VRHADD.U32 Argument Preparation a register: Qnb register: Qm Architectures MVE |
Copyright © 1995-2025 Arm Limited (or its affiliates). All rights reserved.