[__arm_]vrshrq_m[_n_s8]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | int8x16_t | [__arm_]vrshrq_m[_n_s8] | (int8x16_t inactive, int8x16_t a, const int imm, mve_pred16_t p) | Shift / Right / Vector rounding shift right | |
Description The immediate variant shifts each element of a vector register to the right by the immediate value. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VRSHRT.S8 Argument Preparation inactive register: Qda register: Qmimm minimum: 1; maximum: 8p register: Rp Architectures MVE | |||||
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