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SIMD ISAReturn TypeNameArgumentsInstruction Group
Heliumuint16x8_t[__arm_]vshlltq[_n_u8](uint8x16_t a, const int imm)Shift / Left / Vector shift left
Description
Selects an element of 8 or 16-bits from either the top half (T variant) or bottom half (B variant) of each source element, performs a left shift by an immediate value, performs a signed or unsigned left shift by an immediate value and places the 16 or 32-bit results in the destination vector.
Results
Qd result
This intrinsic compiles to the following instructions:

VSHLLT.U8 Qd,Qm,#imm

Argument Preparation
a register: Qmimm minimum: 1; maximum: 8
Architectures
MVE