[__arm_]vshlq[_s16]
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Helium | int16x8_t | [__arm_]vshlq[_s16] | (int16x8_t a, int16x8_t b) | Shift / Left / Vector shift left | |
Description The immediate variant shifts each element of a vector register to the left by the immediate value. The register variants shift each element of a vector register by the value specified in a source register. The direction of the shift depends on the sign of the element from the second vector register. The vector variant shifts each element of the first vector by a value from the least significant byte of the corresponding element of the second vector and places the results in the destination vector. Results Qd result This intrinsic compiles to the following instructions: VSHL.S16 Argument Preparation a register: Qmb register: Qn Architectures MVE |
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