[__arm_]vshrq_m[_n_u16]
SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
---|---|---|---|---|---|
Helium | uint16x8_t | [__arm_]vshrq_m[_n_u16] | (uint16x8_t inactive, uint16x8_t a, const int imm, mve_pred16_t p) | Shift / Right / Vector shift right | |
Description Shifts each element of a vector register to the right by the immediate value. Results Qd result This intrinsic compiles to the following instructions: VMSR VPST VSHRT.U16 Argument Preparation inactive register: Qda register: Qmimm minimum: 1; maximum: 16p register: Rp Architectures MVE |
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