[__arm_]vst1q_p[_s16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | void | [__arm_]vst1q_p[_s16] | (int16_t * base, int16x8_t value, mve_pred16_t p) | Store / Stride | |
Description Stores vector to memory, alias to vstr intrinsics where the element size of the input vector is the same as the element size being stored to memory. Results void result This intrinsic compiles to the following instructions: VMSR VPST VSTRHT.16 Argument Preparation base register: Rnvalue register: Qdp register: Rp Architectures MVE | |||||
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