[__arm_]vstrhq_scatter_shifted_offset_p[_s16]
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Helium | void | [__arm_]vstrhq_scatter_shifted_offset_p[_s16] | (int16_t * base, uint16x8_t offset, int16x8_t value, mve_pred16_t p) | Store / Scatter | |
Description Store consecutive elements to memory from a vector register. In indexed mode, the target address is calculated from a base register offset by an immediate value. Otherwise, the base register address is used directly. The sum of the base register and the immediate value can optionally be written back to the base register. Results void result This intrinsic compiles to the following instructions: VMSR VPST VSTRHT.16 Argument Preparation base register: Rnoffset register: Qmvalue register: Qdp register: Rp Architectures MVE | |||||
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