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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint32_tvaddlvq_s16(int16x8_t a)Vector arithmetic / Across vector arithmetic / Addition across vector widening
Description
Signed Add Long across Vector. This instruction adds every vector element in the source SIMD&FP register together, and writes the scalar result to the destination SIMD&FP register. The destination scalar is twice as long as the source vector elements. All the values in this instruction are signed integer values.
Results
Sd result
This intrinsic compiles to the following instructions:

SADDLV Sd,Vn.8H

Argument Preparation
a register: Vn.8H
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand = V[n];
integer sum;

sum = Int(Elem[operand, 0, esize], unsigned);
for e = 1 to elements-1
    sum = sum + Int(Elem[operand, e, esize], unsigned);

V[d] = sum<2*esize-1:0>;