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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32_tvaddvq_u32(uint32x4_t a)Vector arithmetic / Across vector arithmetic / Addition across vector
Description
Add across Vector. This instruction adds every vector element in the source SIMD&FP register together, and writes the scalar result to the destination SIMD&FP register.
Results
Sd result
This intrinsic compiles to the following instructions:

ADDV Sd,Vn.4S

Argument Preparation
a register: Vn.4S
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand = V[n];
V[d] = Reduce(op, operand, esize);