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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x4_tvbcaxq_u32(uint32x4_t a, uint32x4_t b, uint32x4_t c)Logical / Bit clear and exclusive OR
Description
Bit Clear and Exclusive OR performs a bitwise AND of the 128-bit vector in a source SIMD&FP register and the complement of the vector in another source SIMD&FP register, then performs a bitwise exclusive OR of the resulting vector and the vector in a third source SIMD&FP register, and writes the result to the destination SIMD&FP register.
Results
Vd.16B result
This intrinsic compiles to the following instructions:

BCAX Vd.16B,Vn.16B,Vm.16B,Va.16B

Argument Preparation
a register: Vn.16Bb c
Architectures
A64

Operation

AArch64.CheckFPAdvSIMDEnabled();

bits(128) Vm = V[m];
bits(128) Vn = V[n];
bits(128) Va = V[a];
V[d] = Vn EOR (Vm AND NOT(Va));