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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonfloat64x1_tvbsl_f64(uint64x1_t a, float64x1_t b, float64x1_t c)Bit manipulation / Bitwise select
Description
Bitwise Select. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register.
Results
Vd.8B result
This intrinsic compiles to the following instructions:

BSL Vd.8B,Vn.8B,Vm.8B

Argument Preparation
a register: Vd.8Bb register: Vn.8Bc register: Vm.8B
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1;
bits(datasize) operand2;
bits(datasize) operand3;
bits(datasize) operand4 = V[n];

case op of
    when VBitOp_VEOR
        operand1 = V[m];
        operand2 = Zeros();
        operand3 = Ones();
    when VBitOp_VBSL
        operand1 = V[m];
        operand2 = operand1;
        operand3 = V[d];
    when VBitOp_VBIT
        operand1 = V[d];
        operand2 = operand1;
        operand3 = V[m];
    when VBitOp_VBIF
        operand1 = V[d];
        operand2 = operand1;
        operand3 = NOT(V[m]);

V[d] = operand1 EOR ((operand2 EOR operand4) AND operand3);