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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x2_tvcgtq_s64(int64x2_t a, int64x2_t b)Compare / Greater than
Description
Compare signed Greater than (vector). This instruction compares each vector element in the first source SIMD&FP register with the corresponding vector element in the second source SIMD&FP register and if the first signed integer value is greater than the second signed integer value sets every bit of the corresponding vector element in the destination SIMD&FP register to one, otherwise sets every bit of the corresponding vector element in the destination SIMD&FP register to zero.
Results
Vd.2D result
This intrinsic compiles to the following instructions:

CMGT Vd.2D,Vn.2D,Vm.2D

Argument Preparation
a register: Vn.2Db register: Vm.2D
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(datasize) operand1 = V[n];
bits(datasize) operand2 = V[m];
bits(datasize) result;
integer element1;
integer element2;
boolean test_passed;

for e = 0 to elements-1
    element1 = Int(Elem[operand1, e, esize], unsigned);
    element2 = Int(Elem[operand2, e, esize], unsigned);
    test_passed = if cmp_eq then element1 >= element2 else element1 > element2;
    Elem[result, e, esize] = if test_passed then Ones() else Zeros();

V[d] = result;