Search all intrinsics
SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x1_tvcopy_lane_u64(uint64x1_t a, const int lane1, uint64x1_t b, const int lane2)Vector manipulation / Copy vector lane
Description
Duplicate vector element to vector or scalar. This instruction duplicates the vector element at the specified element index in the source SIMD&FP register into a scalar or each element in a vector, and writes the result to the destination SIMD&FP register.
Results
Dd result
This intrinsic compiles to the following instructions:

DUP Dd,Vn.D[lane2]

Argument Preparation
a register: UNUSEDlane1 minimum: 0; maximum: 0b register: Vn.1Dlane2 minimum: 0; maximum: 0
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(idxdsize) operand = V[n];
bits(datasize) result;
bits(esize) element;

element = Elem[operand, index, esize];
for e = 0 to elements-1
    Elem[result, e, esize] = element;
V[d] = result;