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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint64x2_tvcopyq_lane_u64(uint64x2_t a, const int lane1, uint64x1_t b, const int lane2)Vector manipulation / Copy vector lane
Description
Insert vector element from another vector element. This instruction copies the vector element of the source SIMD&FP register to the specified vector element of the destination SIMD&FP register.
Results
Vd.2D result
This intrinsic compiles to the following instructions:

INS Vd.D[lane1],Vn.D[lane2]

Argument Preparation
a register: Vd.2Dlane1 minimum: 0; maximum: 1b register: Vn.1Dlane2 minimum: 0; maximum: 0
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(idxdsize) operand = V[n];
bits(128) result;

result = V[d];
Elem[result, dst_index, esize] = Elem[operand, src_index, esize];
V[d] = result;