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SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonfloat32x4_tvcvt_high_f32_f64(float32x2_t r, float64x2_t a)Data type conversion / Conversions
Description
Floating-point Convert to lower precision Narrow (vector). This instruction reads each vector element in the SIMD&FP source register, converts each result to half the precision of the source element, writes the final result to a vector, and writes the vector to the lower or upper half of the destination SIMD&FP register. The destination vector elements are half as long as the source vector elements. The rounding mode is determined by the FPCR.
Results
Vd.4S result
This intrinsic compiles to the following instructions:

FCVTN2 Vd.4S,Vn.2D

Argument Preparation
r register: Vd.2Sa register: Vn.2D
Architectures
A64

Operation

CheckFPAdvSIMDEnabled64();
bits(2*datasize) operand = V[n];
bits(datasize) result;

for e = 0 to elements-1
    Elem[result, e, esize] = FPConvert(Elem[operand, e, 2*esize], FPCR[]);

Vpart[d, part] = result;