vdup_laneq_f64
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Neon | float64x1_t | vdup_laneq_f64 | (float64x2_t vec, const int lane) | Vector manipulation / Set all lanes to the same value | |
Description Set all vector lanes to the same value Results Dd result This intrinsic compiles to the following instructions: DUP Argument Preparation vec register: Vn.2Dlane minimum: 0; maximum: 1 Architectures A64 OperationNo operation information. | |||||
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