vdup_laneq_p16
| SIMD ISA | Return Type | Name | Arguments | Instruction Group | |
|---|---|---|---|---|---|
| Neon | poly16x4_t | vdup_laneq_p16 | (poly16x8_t vec, const int lane) | Vector manipulation / Set all lanes to the same value | |
Description Set all vector lanes to the same value Results Vd.4H result This intrinsic compiles to the following instructions: DUP Argument Preparation vec register: Vn.8Hlane minimum: 0; maximum: 7 Architectures A64 OperationNo operation information. | |||||
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