SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonpoly8x8_tvdup_laneq_p8(poly8x16_t vec, const int lane)Vector manipulation / Set all lanes to the same value
Description
Set all vector lanes to the same value
Results
Vd.8B result
This intrinsic compiles to the following instructions:

DUP Vd.8B,Vn.B[lane]

Argument Preparation
vec register: Vn.16Blane minimum: 0; maximum: 15
Architectures
A64

Operation

No operation information.