SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint32x2_tvdup_laneq_u32(uint32x4_t vec, const int lane)Vector manipulation / Set all lanes to the same value
Description
Set all vector lanes to the same value
Results
Vd.2S result
This intrinsic compiles to the following instructions:

DUP Vd.2S,Vn.S[lane]

Argument Preparation
vec register: Vn.4Slane minimum: 0; maximum: 3
Architectures
A64

Operation

No operation information.