SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint8_tvdupb_laneq_u8(uint8x16_t vec, const int lane)Vector manipulation / Extract one element from vector
Description
Set all vector lanes to the same value
Results
Bd result
This intrinsic compiles to the following instructions:

DUP Bd,Vn.B[lane]

Argument Preparation
vec register: Vn.16Blane minimum: 0; maximum: 15
Architectures
A64

Operation

No operation information.