SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint16_tvduph_lane_u16(uint16x4_t vec, const int lane)Vector manipulation / Extract one element from vector
Description
Set all vector lanes to the same value
Results
Hd result
This intrinsic compiles to the following instructions:

DUP Hd,Vn.H[lane]

Argument Preparation
vec register: Vn.4Hlane minimum: 0; maximum: 3
Architectures
A64

Operation

No operation information.