SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint16_tvduph_laneq_u16(uint16x8_t vec, const int lane)Vector manipulation / Extract one element from vector
Description
Set all vector lanes to the same value
Results
Hd result
This intrinsic compiles to the following instructions:

DUP Hd,Vn.H[lane]

Argument Preparation
vec register: Vn.8Hlane minimum: 0; maximum: 7
Architectures
A64

Operation

No operation information.