SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonint32x4_tvdupq_lane_s32(int32x2_t vec, const int lane)Vector manipulation / Set all lanes to the same value
Description
Set all vector lanes to the same value
Results
Vd.4S result
This intrinsic compiles to the following instructions:

DUP Vd.4S,Vn.S[lane]

Argument Preparation
vec register: Vn.2Slane minimum: 0; maximum: 1
Architectures
v7, A32, A64

Operation

No operation information.