SIMD ISAReturn TypeNameArgumentsInstruction Group
Neonuint16x8_tvdupq_laneq_u16(uint16x8_t vec, const int lane)Vector manipulation / Set all lanes to the same value
Description
Set all vector lanes to the same value
Results
Vd.8H result
This intrinsic compiles to the following instructions:

DUP Vd.8H,Vn.H[lane]

Argument Preparation
vec register: Vn.8Hlane minimum: 0; maximum: 7
Architectures
A64

Operation

No operation information.